Trouble detector



Aug. 2, 1960 R. F. CASEY ETAL TROUBLE DETECTOR 2 Sheets-Sheet l FiledAug. l, 1957 INVENToRs 'ROBERT F. CASEY JOHN GIBBON 9 Aug. 2, 1960 R. F.CASEY ETAL 2,947,943

TROUBLE DETECTOR Filed Aug. l, 1957 2 Sheets-Sheet 2 IN V EN TORS ROBERTF. CASEY JOHN GIBBON 2,947,943 p Patented Aug. 2, 1960 2,941,943 TROUBLEnErEcToR Robert F, Casey, Pompton Plains, and John Gibbon, MorrisPlains, NJ., assignors to Monroe Calculating Machine Company, Orange,NJ., a corporation of Delaware Filed Aug. 1, 1957, Ser. No. 675,666

2 Claims. (C1. 324-158) This invention relates to apparatus fordetecting deterioration in` binary circuits preceding failure.

Failures occur in electronic'equipment at more or less random times andthus impose a requirement for almost constant vigilance to preventerroneous results. ln electronic computers and similar apparatus, manyfailures and errors do not produce obvious indications and elaboratemeans are necessary to` guarantee against wrong results. One such meanswhich scans and cornpares the output of dual circuits is shown in theco- A,pending U.S. patent application Ser. No. 439,675, led

June 28, 1954, by W. H. Burkhart.

Well designed electronic equipment will continue to operatesatisfactorily even though the functions of individual circuits arebelow` their usual standards. If. the performance of the individualcircuits are checked against stringent standards, deterioration can bedetected before it has caused faulty operations. Such deterioration canthen be corrected by repair or replacement to prevent a fault fromoccurring.

The present invention provides a means for detecting deterioration inthe performance of binary circuits in computers and other dataprocessing equipment s that faulty operations can be avoided. Steppingswitches connect the outputs of key circuits successive- 1y to a meanswhich checks the performance against permissible standards. The checkscan be made while the equipment is operating normally or specialconditions for checking can be time multiplexed with the normaloperation to speed up the checking.

The principal check made is on the time f Or the Outputs to change fromone level to another when capacitively loaded. In most cases, a loss ofperformance capability will increase the time required for the change.The checking apparatus compares the time for transition with a standardinterval and produces an indication if the time is too long or tooshort. The apparatus also produces an indication if the two levels arenot within predetermined limits. The stepping switch may be stopped onthe point at which an erroneous indication is obtained and an alarmsignal produced or van identification of the point may be recorded as aguide for repair at a convenient time.

If the checks are made during normal operation, lthe stepping switchmust remain on` each point long -enough to provide a high probabilitythat the respective circuit has changed condition at least once. Theinvention also includes means for periodically interrupting the normaloperation of the equipment long enough to cycle each bistable circuitfrom and back to its existing condition. The movements of the steppingswitch may be synchronized with these interruptions so that checks maybe conducted rapidly and two transitions will be obtained during eachcheck.

An object of the invention is a means for locating deterioratingelectronic circuits in binary equipment beforefthey cause faultyoperations.

2 A further object of the invention is an economical apparatus forlocating trouble and reducing the probability of errors in digitalequipment.

Other objects and a fuller understanding of the invention may be had'byreferring to the following de' scription and claims, taken inconjunction with the accompanying drawings in which:

Fig. 1 is a block diagram of an embodiment of the invention.

Fig. 2 shows representative signal waveforms occurring at various pointsin the apparatus of Fig. l.

Fig. 3 is a partial block and partial schematic diagram of a rampconverter for the apparatus of Fig. 1.

This invention is particularly applicable to dip-ops of the type`disclosed in copending application, Serial No. 520,981, now Patent No.2,916,802, and reference is specifically made thereto for a completedescription of this dip-flop.

Referring now to Fig. l, dip-Hops 1'1 are part of a binary equipmentWhose Operation is to be monitored and are illustrative of the typeabove referred to. An output of each flip-flop 11 is connected to one ofcontacts 13 of a stepping switch. The outputs of other circuits of thebinary equipment are connected to other contacts 13. These othercircuits may also be flip-flops or may be other types of binary circuitshaving two different levels of output corresponding to their twodifferent conditions and having transition times comparable to thoseproper for iiip-ilops 11.

For normal operation as part of the binary equipment, outputs ofdip-flops 11 are also applied to other points. -Inputs to the set andreset sides of Hip-flops 11 are applied from other points in theequipment through crystal diodes 14. Test pulses are applied to bothsides of flip-flops 11 through crystal diodes 15. The binary equipmentis of a type in which timing pulses are used to synchronize and advanceoperations. A means (not shown) interrupts the timing pulses to suspendoperation at periodic intervals and produces two ,successive test pulsesduring each interval. The first test pulse causes ilip-ops 11 to changecondition and the second test pulse causes them `to change back to theoriginal con dition so that normal operation can continue after theinterruption.

Contacts 13, arm 16, and stepper 17 may comprise a conventional steppingswitch. Arm 16 is moved t0 each of contacts 13 in turn by Stepper 17.The test pulses are applied to stepper 17 and each pulse advances it onestep to synchronize its positioning with the interruption of normaloperation and the cycling of flip-flops 11. `If interruptions of normaloperation and test pulses are not used, ystepper 17 can be free runningat a rate that will leave arm 16 on each contact long enough to providea high probability that thenormal operation has caused the associatedflip-flop 11 to change condition.

-Ramp converter 18 and Schmidt trigger circuits 19 and 20 are connectedto arm 16. One output of ramp converter 18 goes to OR gate 21 andanother output goes to one shot multivibrator 22 and to OR gate 23. Theoutput of one shot multivibrator 22 goes to OR gate 21. Schmidt triggercircuits 19 and 20 provide outputs to OR gate 24` through cathodefollower 25 and inverter 26, respectively.` `One shot multivibrator 27is driven by the test pulses and has its output applied throughdifferentiator 28 to OR gates 23 and 24. The outputs of VOR gates 21, 23and 24 are applied to AND gate 29. The output of AND gate 29-drivesalarm 30 which provides an output to stepper 17.

Referring now also to Fig. 2, a pair of test pulses as shown at (a) areapplied periodically to the inputs of flip-flops 11 through crystaldiodes 15. As the test pulses areapplied to both sides of lip-ops ,11,each EJ causes them to change state. -As a flip-hop 11 changes state,its output moves from one level to the other at a specific rate. If theoutput was initially low, the Waveform will be substantially as shown at(I2).y t

'When `an input like 'that Shown et (b) iS applied to ramp converter 18,it produces two outputs substantially as shown at (c) and (d). Each timethe input changes from one level to another, a positive pulse isgenerated in one output and a negative pulse in the other. The durationof the pulses is the same as the transition time between levels. rOneform of ramp converter 13 is shown in Fig. 3 and will be describedhereinafter.

The positive pulses from rainp converter 18 are applied to OR gate 21and the negative Vpulses to one shot multivibrator 22 and te 'OR gate2,3. One shot multivibrator 22 triggers on the .leading edge of eachnegative pulse and produces a negative pulse of Xed duration as shown at(e) to drive QR gate 21. OR gate 21 produces a positive output exceptwhen both its inputs are negative. This will occur only if the pulsefrom ramp converter `18 is shorter than the Xed duration pulse. OR gate21 will then produce av negative output which indicates that the outputof a flip-Hop 11 applied through arm 16 has changed from one level toanother too rapidly.

The timingv pulses also trigger one shot multivibrator 27 to produce apositive pulse of iixed duration. Diierentiator 28 ope/rates on thetrailing edge of the fixed duration pulse to produce a negative outputspike as shown at (f), which is applied to OR gates 23 and 24. Like ORgate 21, OR gate 23 produces a positive output except when both itsinputs are negative. This will happen only if the spike is producedwhile the output from ramp converter 18 is still negative. OR gate 23then pro` duces a negative output which Vindicates that the outputapplied through arm 16 has changed yfrom one level to another tooslowly.

Schmidt trigger circuit 19 produces a positive output as shown at (g)onlywhen the voltage on arm 16 is labove a predetermined positive level.Schmidt trigger circuit 20 produces a positive output only when thevoltage on arm 16 is more positive than `a predetermined negative level.The outputs of Schmidt trigger circuits 19 and 20 are applied to OR gate24 through cathode follower 25 and inverter 26, respectively. Inverter26 reverses the polarity of the output of Schmidt trigger circuit 20, asshown `at (h). As previously mentioned, OR gate 24 receives the negativespikes from dilferentiator 28 as a third input.

yOne of the two inputs to `O-R gate 24 from cathode follower 25 andinverter 26 is thus positive during intervals when the voltage, on arm16 is within an Aallowable tolerance of either a positive or negativelevel. Both of these inputs will be negative when the voltage on -arm 16is between the two levels. If this latter condition obtains during theoccurrence of the negative spikel from diiferentiator v28, OR gate 24will produce a negative output to indicate a. deterioration in eitherthe positive or negative level of the flip-flop 11 being tested.

The outputs of OR gates 21, 23 and 24 are applied to AND gate 29. ANDgate 29 produces a positive output to maintain alarm circuit 30 in anoff condition as long as all its inputs are positive. If one or moreinputs to AND gate 29 go negative, its output to alarm circuit 36 goesnegative and causes `alarm circuit 30 to energize a warning lamp orbuzzer and preventstepper I17 from advancing. The position of arm16vthen indicates which of ip-ilops'11 or other circuits is responsiblefor the indication.` An indication canalso be produced Aby a failure ofcircuits in the checking apparatus Vpreceding and including AND gate 29.

Alarm circuitA 30 may 'consist of a warning lamp or buzzer and a lockonrelay which is energized Vby the negative signal from. AND gate 29.Onepole of the relay `may control the Warning lamp or buzzer and anotherpole rnay controlnthe stopping of `stepper 17. One shot multivibrators22 and 27, lSchmidt trigger circuits 19 and 20, diiferentiator 28, ORgates 21, 23 and 24, and AND gate 29 may be of standard types well knownto those skilled in the digital computer art.

lt will be recognized that various other combinations and arrangementsof circuits could be used to perform the necessary functions and thatthe apparatus could be used in various other ways.' If normal operationis not interrupted to cycle Aiiip-ops I1, diodes and the test ypulsescould be eliminated and the timing pulses em-V played in normal.operation could lie-applied t0 oneshot multivibrator 27 in place of thetest pulses. Stepper 17 would advance arm 16 independently at a slow.rate to Y provide a high probability that each circuit would cycle atleast once while it was being checked.

instead of stopping stepper 17 and energizing a warning lamp or buzzer,alarm circuit V30 could energize a recorder to record a codecorresponding to the position of arrn "16, Another set of contacts 13and arm .16 driven by stepper '1 7 couldV be used to drive a codegenerator and the recorder could be a spare storage channel built intothe computer or other processing eguiprnent.

Referring now to Fig. 3, diiferentiator 31 is driven by the signal onarm 176. When this signal is as shown at (b) in Fig. 2, the output of diierentiator 31 will be substantially as shown at (i). A positive pulseis produced when the signal changes inl a positive direction and anegative pulse when the change is in a negative direction. It is thepurpose of the remaining circuits of yramp conveter 18 to make bothpositive and negative pulses positive in one output `and negative inanother as shown. at (c) and (d).

Condenser 32 couples the output of differentiator 31 to the anode ofcrystal diode 33 and the cathode of crystal diode 34. Crystal diode 35has its cathode connected to the cathode of crystal diode 33 and itsanode to ground. Crystal diode 36 has its anode connected to the anodeof crystal diode 34 and its cathode to ground. Resistor 37 is connectedbetween the junctions of crystal diodes 33 and 35 and of crystal diodes34 and 36 which are respectively connected to the ygrids of tubes 38 and39.

The plates of tubes 38 and 39 are connected to a positive potentialsource through resistors 40 and 41, respectively, andan output is takenfrom 'each plate. 'Ilhe cathodes of tubes `38 and 39 are connected toanegative potential source through the series combinationsv of resistors42 and 43 and through resistor 44, respectively. Crystal diode 45 hasits cathode connected to the cathode of tube 39 and its anode to thejunction of resistors 42 and 43.

Crystal diode 33 passes the positive pulses from differentiator 31 tothe grid of tube 3S and blocks the nega tive pulses. Crystal diode 34passes the negative pulses to the grid of tube 39 and blocks thepositive pulses. Crystal diodes 35 and 36 offer high impedances to thepositive and negative pulses, respectively, andv 10W irnpedances to thenegativev and positive pulses, respectively. Resistor y37 provid-es apath for the charging and discharging of condenser y32 to maintain theaverage voltage near ground potential.

A positive pulse on the grid of tube 38 increases its conduction andproduces a negativepulse output from its plate. The increased currentthrough tube 38 also raises the voltage on its cathode `andon thejunction of resistors 42 and 4 3. Crystal diode 45 conducts and pullsthe cathode of tube 39 positive with the junction of resistors 42 and43. This decreases the current through tube 39 and produces a positivepulse output at its plate.

A negative pulse applied to the gridY of tube 39 also decreases itsconduction and produces a positive pulse output at its plate. Thedecrease of, current through tube 39 lowers the voltage on its cathode.Crystal diode 45 conducts and also lowers the voltage on the junction ofresistors 42 and 43 andy on-thecathode of'tube-*38- This causes thecurrent through tube 38 to increase and results in a negative pulse atits plate.

Resistor 42 is relatively small while resistors 43 and 44 aresubstantially the same size. As the grids of tubes 33 or 39 are normallyat the same potential, the input signal to either must exceed a givenmagnitude before crystal diode 45 conducts. Before crystal diode 45conducts, the effective cathode impedances of tubes 38 and 39 are highand the one which is driven therefore has a low gain factor. When theinput signal exceeds the given magnitude and crystal diode 45 conducts,the effective cathode impedances become low due to the inter cathodecoupling, and the gain factors become large.

Tubes 38 and 39 and their associated components thus perform twofunctions. One is to effectively slice the input signal components thatare below a given magnitude from the output. The other is to cause bothpositive and negative pulses from differentiator 31 to produce negativepulses in the output of tube 38 and positive pulses in the output oftube 39.

Although the invention has been described with a certain degree ofparticularity, it is understood that the present disclosure has beenmade only by way of example and that numerous changes in the details ofconstruction and the combination and arrangements of parts may beresorted to without departing from the spirit and scope of the inventionas hereinafter claimed.

What is claimed is:

l. In apparatus for detecting vdeterioration in a binary circuit havingtwo levels of output signals corresponding to the two states of saidcircuit, respectively, the cornbination comprising a signal sourceconnected for changing the state of said binary circuit, means connectedto an output of said binary circuit and to an output of said source ofstate changing signals for determining if the time required for theoutput signal from said binary circuit to change from one level to theother lies within preassigned limits, means for determining if the levelof said binary circuit output signal corresponds to one of said levels,indicating means connected to receive signals from both said determiningmeans and being rendered operative by negative response from one of saiddeterminations, wherein said rst named determining means comprises meansresponsive to substantially linearly varying inp-ut signals forgenerating an output signal of fixed amplitude and of durationcorresponding to the duration of an input signal, said last namedresponsive tion corresponding to means being connected to receive asinput signals the output signals from said binary circuit, and whereinsaid rst named determining means further comprises signal generatingmeans for generating a signal having a durathe allowable duration of theshift of said `binary circuit between said levels, and a secondgenerating means for generating a signal having a duration in excess ofa maximum allowable transition time for the aforementioned binary outputsignals, gating means connected to receive signals from said linearlyvarying signal responsive imeans and signals from said first namedsignal generating means, said gating means being responsive to thepresence of a signal from said first signal generating means and to theabsence of a signal from said linearly varying signal responsive meansfor generating a first gating signal, sense pulse producing meansconnected to receive signals from said second signal generating means,said sense pulse means being `responsive to the termination of receivedsignals, and second gating means connected to receive signals from saidlinearly varying signal responsive means and from said sense pulseproducing means for generating an output signal in said indicating meansupon the coincidence of signals from said last two mentioned means.

2. Apparatus as set forth in claim l wherein said second nameddetermining means comprises first and second signal generating circuitseach connected to receive output signals from said binary circuit, therst of said last named signal generating circuits being responsive toinput signals of a level corresponding to the upper one of saidaforementioned levels and the second of said last named signalgenerating means being responsive to an input signal of a levelcorresponding to the lower one of said aforementioned binary circuitsignal levels, and third gating means connected to receive input signalsfrom said last named first and second signal generating means and fromsaid sense pulse producing means, said third gating means beingresponsive to an absence of signals from either of said last namedsignal generating means upon the occurrence of a pulse form said sensepulse producing means.

References Cited in the file of this patent UNITED STATES PATENT oEEICECERTIFICATION OF CORRECTION Patent No 2,947,943 August 2, 1963 RobertEl. Casey et. a1.

It is hereby certified that error appears in the above numbered patentrequiring correction and that the said Letters Patent should read ascorrected below.

In the drawings, Fig, 1, the connections of the outputs of flip-Hops 11to ground should be removed; in the printed specification, column 2,lines 15 and 16, for "Serial No 5231,98 now Patent No. 2,916,802" readSeriaI No. 570,981, now

Patent No., 2,921,192

Signed an@ sealed this 25th day o April 1961.

(SEAL) Attest:

ERNEST We SWIDER Attesting Officer DAVID L., LDD Commissioner of Patents

